BITSILICA - Senior Physical Design Lead/Manager - SoC/RTL
12 hours ago
Job Description Key Responsibilities - Lead SoC/IP physical implementation through all stages of the RTL-to-GDSII flow for advanced nodes (7nm and below). - Drive PPA (Power, Performance, Area) optimization at block and top levels. - Own floorplanning, placement, CTS, routing, and signoff activities to meet design targets. - Perform STA, IR/EM analysis, and integrate power intent using UPF. - Ensure full physical verification (DRC/LVS) closure using industry-standard EDA tools. - Manage ECO implementation, timing closure, and final tapeout preparation. - Guide and mentor a team of physical design engineers; provide technical leadership throughout the project lifecycle. - Work closely with RTL, DFT, synthesis, verification, and architecture teams to resolve cross-functional issues. - Prepare project plans, track execution, and ensure delivery milestones are met. - Identify and implement flow improvements, automation, and best practices for efficiency. Required Skills & Experience - Strong hands-on experience in RTL-to-GDSII flow at advanced process nodes (7nm, 5nm, 3nm preferred). - Expertise in floorplanning, placement, CTS, routing, and signoff methodologies. - Proficiency in: - STA (Static Timing Analysis) - IR/EM analysis - Physical verification (DRC/LVS) - Power analysis - Hands-on experience with leading EDA tools such as: - Cadence Innovus - Synopsys PrimeTime - Mentor/Siemens Calibre - Strong scripting skills in TCL, Perl, Python for flow automation. - Experience with UPF for power intent implementation. - Solid understanding of SoC architecture and block/top-level implementation practices. - Excellent problem-solving, communication, and team leadership skills. Preferred Qualifications - Prior experience leading multiple successful tapeouts. - Knowledge of advanced packaging, multi-die integration, or chiplet-based design. - Exposure to cloud-based EDA workflows. (ref:hirist.tech)
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Bengaluru, India BITSILICA Full timeKey Responsibilities:- Lead SoC/IP physical implementation through all stages of the RTL-to-GDSII flow for advanced nodes (7nm and below).- Drive PPA (Power, Performance, Area) optimization at block and top levels.- Own floorplanning, placement, CTS, routing, and signoff activities to meet design targets.- Perform STA, IR/EM analysis, and integrate power...
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Senior Physical Design Lead
3 days ago
Bengaluru, India BITSILICA Full timeJob Description:We are seeking a Physical Design Lead with strong expertise in RTL-to-GDSII flow for advanced technology nodes (7nm and below). The role involves leading SoC/IP physical implementation, driving PPA goals, and ensuring successful tapeouts. You will manage a team, interface with cross-functional groups, and own block/top-level execution.Key...
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Senior Physical Design Lead
2 days ago
Bengaluru, India BITSILICA Full timeJob Description:We are seeking a Physical Design Lead with strong expertise in RTL-to-GDSII flow for advanced technology nodes (7nm and below). The role involves leading SoC/IP physical implementation, driving PPA goals, and ensuring successful tapeouts. You will manage a team, interface with cross-functional groups, and own block/top-level execution.Key...
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Senior Physical Design Lead
4 days ago
Bengaluru, India BITSILICA Full timeJob Description:We are seeking a Physical Design Lead with strong expertise in RTL-to-GDSII flow for advanced technology nodes (7nm and below). The role involves leading SoC/IP physical implementation, driving PPA goals, and ensuring successful tapeouts. You will manage a team, interface with cross-functional groups, and own block/top-level execution.Key...
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Senior Physical Design Lead
4 days ago
Bengaluru, India BITSILICA Full timeJob Description: We are seeking a Physical Design Lead with strong expertise in RTL-to-GDSII flow for advanced technology nodes (7nm and below). The role involves leading SoC/IP physical implementation, driving PPA goals, and ensuring successful tapeouts. You will manage a team, interface with cross-functional groups, and own block/top-level execution. Key...
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Senior Physical Design Lead
2 days ago
Bengaluru, India BITSILICA Full timeJob Description: We are seeking a Physical Design Lead with strong expertise in RTL-to-GDSII flow for advanced technology nodes (7nm and below). The role involves leading SoC/IP physical implementation, driving PPA goals, and ensuring successful tapeouts. You will manage a team, interface with cross-functional groups, and own block/top-level execution. Key...
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Senior Physical Design Lead
5 days ago
Bengaluru, India BITSILICA Full timeJob Description: We are seeking a Physical Design Lead with strong expertise in RTL-to-GDSII flow for advanced technology nodes (7nm and below). The role involves leading SoC/IP physical implementation, driving PPA goals, and ensuring successful tapeouts. You will manage a team, interface with cross-functional groups, and own block/top-level execution. Key...
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Senior Physical Design Lead/Manager
3 days ago
Bengaluru, Karnataka, India BITSILICA Full time ₹ 24,00,000 - ₹ 90,00,000 per yearKey ResponsibilitiesLead SoC/IP physical implementation through all stages of the RTL-to-GDSII flow for advanced nodes (7nm and below).Drive PPA (Power, Performance, Area) optimization at block and top levels.Own floorplanning, placement, CTS, routing, and signoff activities to meet design targets.Perform STA, IR/EM analysis, and integrate power intent using...
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SoC RTL Design Lead
3 weeks ago
Bengaluru, India Texas Instruments Full timeWe are looking for an experienced Senior RTL Design Lead to join our team in developing cutting-edge control solutions and Application specific SoC products. The ideal candidate will have deep understanding of RTL design and SoC integration, particularly in the context of ARM-based architectures, and a proven ability to collaborate across multiple...
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SoC RTL Design Lead
4 weeks ago
Bengaluru, India Texas Instruments Full timeWe are looking for an experienced Senior RTL Design Lead to join our team in developing cutting-edge control solutions and Application specific SoC products. The ideal candidate will have deep understanding of RTL design and SoC integration, particularly in the context of ARM-based architectures, and a proven ability to collaborate across multiple...