Strategic / Leadership Role - PD Methodology (CPU)

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. Job Description: We are seeking a highly experienced and innovative Fellow to join our Physical Design (PD) Methodology team. The successful candidate will be responsible for driving advancements in PD methodologies, strategies, and tools to optimize the design and implementation of our semiconductor products. This role requires a deep understanding of physical design, EDA tools, and the ability to partner with cross-functional teams to achieve state-of-the-art design efficiency and performance. Key Responsibilities: Drive PD Methodology Innovations: Lead the development and implementation of cutting-edge physical design methodologies to enhance design efficiency, performance, and manufacturability. Strategic Planning: Develop and execute strategies that align with industry trends and company goals. Provide strategic direction for PD-related projects and initiatives. Methodology Development: Create and refine methodologies for physical design, including floorplanning, placement, routing, and timing closure. Ensure these methodologies are integrated into the design and development processes. End-to-End Design Optimization: Oversee the entire physical design process from initial concept to tape-out. Ensure design efficiency and performance are maintained throughout the product lifecycle. Cross-Functional Collaboration: Work closely with RTL design teams, verification teams, and other engineering groups to integrate physical design methodologies across all levels of the system. Vendor Engagement: Collaborate with EDA tool vendors such as Synopsys and Cadence to ensure tools meet our design requirements. Drive joint development efforts and influence tool enhancements. Tool and Flow Automation: Lead efforts in the development and optimization of EDA tools for physical design. Work with tool vendors to ensure the tools meet our design requirements. Signoff Enablement: Ensure that all physical design methodologies and processes meet signoff criteria for manufacturability and performance. Technology and Library Enablement: Work with technology and library teams to enable new technologies and libraries in the physical design flow. PPA Optimization Guidance: Provide guidance on optimizing power, performance, and area (PPA) during the physical design process. Debug and Support: Lead efforts in debugging design issues and providing support to design teams to resolve complex physical design challenges. Industry Engagement: Stay abreast of the latest advancements in physical design within the semiconductor industry. Represent the company in industry forums, conferences, and collaborations to influence and adopt best practices. Cross-Functional Leadership: Collaborate with various teams, including design, verification, software, and product management, to ensure physical design goals are met. Provide technical guidance and mentorship to team members. Innovation and Research: Foster a culture of innovation by encouraging research and experimentation in physical design techniques. Identify opportunities for patents and publications. Metrics: Define and track key performance indicators (KPIs) related to physical design efficiency and performance. Report on progress and impact to senior leadership. Qualifications Education: Ph.D. or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Experience: Minimum of 20 years of experience in physical design, EDA tools, or related areas. Proven track record of driving PD methodology innovations and strategies in a leading semiconductor company. Technical Expertise: Deep understanding of physical design, EDA tools, and design optimization techniques. Proficiency in relevant tools and technologies. Publications and Patents: Demonstrated history of publications in reputable journals and conferences. Experience with filing and securing patents related to physical design and EDA tools. Leadership Skills: Strong leadership and team management skills. Ability to lead cross-functional teams and drive complex projects to successful completion. Communication: Excellent verbal and written communication skills. Ability to articulate complex technical concepts to diverse audiences. Industry Knowledge: In-depth knowledge of industry trends, standards, and best practices in physical design for semiconductors #LI-SK5 CTERR1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.Job Description: We are seeking a highly experienced and innovative Fellow to join our Physical Design (PD) Methodology team. The successful candidate will be responsible for driving advancements in PD methodologies, strategies, and tools to optimize the design and implementation of our semiconductor products. This role requires a deep understanding of physical design, EDA tools, and the ability to partner with cross-functional teams to achieve state-of-the-art design efficiency and performance. Key Responsibilities: Drive PD Methodology Innovations: Lead the development and implementation of cutting-edge physical design methodologies to enhance design efficiency, performance, and manufacturability. Strategic Planning: Develop and execute strategies that align with industry trends and company goals. Provide strategic direction for PD-related projects and initiatives. Methodology Development: Create and refine methodologies for physical design, including floorplanning, placement, routing, and timing closure. Ensure these methodologies are integrated into the design and development processes. End-to-End Design Optimization: Oversee the entire physical design process from initial concept to tape-out. Ensure design efficiency and performance are maintained throughout the product lifecycle. Cross-Functional Collaboration: Work closely with RTL design teams, verification teams, and other engineering groups to integrate physical design methodologies across all levels of the system. Vendor Engagement: Collaborate with EDA tool vendors such as Synopsys and Cadence to ensure tools meet our design requirements. Drive joint development efforts and influence tool enhancements. Tool and Flow Automation: Lead efforts in the development and optimization of EDA tools for physical design. Work with tool vendors to ensure the tools meet our design requirements. Signoff Enablement: Ensure that all physical design methodologies and processes meet signoff criteria for manufacturability and performance. Technology and Library Enablement: Work with technology and library teams to enable new technologies and libraries in the physical design flow. PPA Optimization Guidance: Provide guidance on optimizing power, performance, and area (PPA) during the physical design process. Debug and Support: Lead efforts in debugging design issues and providing support to design teams to resolve complex physical design challenges. Industry Engagement: Stay abreast of the latest advancements in physical design within the semiconductor industry. Represent the company in industry forums, conferences, and collaborations to influence and adopt best practices. Cross-Functional Leadership: Collaborate with various teams, including design, verification, software, and product management, to ensure physical design goals are met. Provide technical guidance and mentorship to team members. Innovation and Research: Foster a culture of innovation by encouraging research and experimentation in physical design techniques. Identify opportunities for patents and publications. Metrics: Define and track key performance indicators (KPIs) related to physical design efficiency and performance. Report on progress and impact to senior leadership. Qualifications Education: Ph.D. or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Experience: Minimum of 20 years of experience in physical design, EDA tools, or related areas. Proven track record of driving PD methodology innovations and strategies in a leading semiconductor company. Technical Expertise: Deep understanding of physical design, EDA tools, and design optimization techniques. Proficiency in relevant tools and technologies. Publications and Patents: Demonstrated history of publications in reputable journals and conferences. Experience with filing and securing patents related to physical design and EDA tools. Leadership Skills: Strong leadership and team management skills. Ability to lead cross-functional teams and drive complex projects to successful completion. Communication: Excellent verbal and written communication skills. Ability to articulate complex technical concepts to diverse audiences. Industry Knowledge: In-depth knowledge of industry trends, standards, and best practices in physical design for semiconductors #LI-SK5 CTERR1Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.