AMS Verification Engineer
2 weeks ago
Job Title : AMS Verification Engineer.
Location : Bangalore.
Job Type : Full-Time.
Position Overview :
As an AMS Verification Engineer, you will be responsible for verifying mixed-signal designs, ensuring their functionality and performance through rigorous testing and simulation.
Your expertise will be crucial in collaborating with cross-functional teams to drive projects from concept through to production.
Key Responsibilities :
- Develop and implement comprehensive verification plans for mixed-signal (AMS) designs.
- Perform analog simulation and digital-analog verification to validate circuit performance.
- Design and maintain effective testbenches for analog and digital components.
- Collaborate closely with design engineers to clarify verification requirements and streamline workflows.
- Analyse simulation results, troubleshoot issues, and provide constructive feedback to the design team.
- Participate in design reviews and contribute to enhancing verification methodologies and processes.
- Document verification findings and prepare detailed reports for internal and external stakeholders.
Qualifications :
- Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field (BTech/BE or higher).
- Minimum of 4 years of professional experience, with at least 3 years focused specifically on AMS verification.
- Proficient in analog simulation tools (i.e., Cadence, Mentor Graphics) and familiar with digital verification methodologies (VHDL/Verilog, System Verilog).
- Strong understanding of mixed-signal circuit design and verification processes.
- Excellent communication skills, with the ability to clearly convey technical concepts to team members and stakeholders.
- Proven ability to work collaboratively in a team-oriented environment, demonstrating flexibility and adaptability.
Preferred Qualifications :
- Experience with mixed-signal components such as DACs and ADCs.
- Knowledge of behavioural modelling, System Verilog Assertions (SVA), and Universal Verification Methodology (UVM).
- Familiarity with automation using any scripting language.
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