Sr. Staff Digital Engineer, WLAN SoC

Description Synaptics is leading the charge in AI at the Edge, bringing AI closer to end users and transforming how we engage with intelligent connected devices, whether at home, at work, or on the move. As the go-to partner for the world’s most forward-thinking product innovators, Synaptics powers the future with its cutting-edge Synaptics Astra™ AI-Native embedded compute, Veros™ wireless connectivity, and multimodal sensing solutions. We’re making the digital experience smarter, faster, more intuitive, secure, and seamless. From touch, display, and biometrics to AI-driven wireless connectivity, video, vision, audio, speech, and security processing, Synaptics is the force behind the next generation of technology enhancing how we live, work, and play.    Overview   Synaptics is looking for a Sr. Staff Digital Engineer, WLAN SoC Design to join our dynamic and growing WPD organization. You will be responsible for WLAN SoC architecture, design, and implementation in the Wi-Fi 6/7 domain from concept to volume production for the IoT market. You will work closely with RF/Analog teams on productizing WLAN/BT combo chips for home IoT and automotive markets. You will be working on scalable and flexible designs that optimize area/power low latency. You will drive innovations in low power design, and performance enhancements. You will application of the latest design methodologies. This position reports to the Director, Silicon Engineering.      Responsibilities & Competencies Job Duties Work with SoC Lead to define WLAN SoC architecture from the standards and/or requirement documents and to define WLAN SoC PPI (power, performance and area) parameters based on feature set   Leads the development and implementation of solutions that impact the strategic direction of new SoC products  Work with the team to deliver the WLAN SoC RTL, Netlist, power collateral, constraints and the Systems/SW team in performance analysis and propose IP enhancements or any new IP requirement in the SoC  Technically lead team on design methodology, and through digital design, RTL implementation, Lint, CDC checks, and timing  Drive design optimization enhancements to meet power and area targets closure, verification and coverage closure, ECO implementation and chip productization debug Work with Systems/SW team in performance analysis and propose IP enhancements  Collaborate with DV team on test plans, closure of code, and functional coverage Support post-silicon bring up activities of new products by working with design, product evaluation and applications engineering team    Competencies Strong fundamentals in CPU architecture, Host interfaces like (PCIe, SDIO etc.), Bus interconnects specially AXI/ACE/AHB/APB, Low power design  Understanding of digital IC design flow (design, verification, synthesis, HW/SW co-working)  Power management with multiple power domains  Deep understanding of the SoC development flow  Knowledge in Lint, CDC, timing constraints, synthesis, STA, power analysis  Excellent written and verbal communication skills to ensure effective communication with Program Management or Engineering Management and group members  Well organized with strong attention to detail; proactively ensures work is accurate  Positive attitude and work ethic; unafraid to ask questions and explore new ideas   Resourceful and able to solve complex problems through adaptation of existing technology and development of new technology with a deep understanding of product architecture  Strong analytical mindset and able to make informed decisions based on experience   Ability to communicate complex, interactive design concepts clearly  Proactive, self-starter, able to work independently in a fast-paced environment to complete projects on time with minimal guidance  Ability to set clear expectations and objectives, and brings parties together to drive key initiatives  Ability to work within a diverse team to mentor and develop team members    Qualifications (Requirements) Bachelor's degree (Master’s preferred) in Computer Engineering, Communication Engineering, Electrical/Electronic Engineering or related field or equivalent experience  12+ years of experience in SoC design  Proven experience in designing digital circuits for wireless product  Experience in advanced front-end design flows based on industry standard EDA tools from system simulation through RTL implementation, verification, synthesis, and interfacing with a backend team  Track record of supporting tapeout of new product  Minimal travel up to 10%      Belief in DiversitySynaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information.