Synthesis (STA) Engineer

4 days ago


New Delhi, India Canvendor Full time

#Urgent_Opening_for_Canvendor#Hiring: Synthesis Engineer (5-10 years) | Bangalore| Immediate Joiners Preferred Location: Bangalore, India Experience: 5-10 years Notice period: Immediate#Key_Requirements:PerformRTL synthesisusing tools like Synopsys Design Compiler, Fusion Compiler, or Cadence Genus. Develop and validatetiming constraints (SDC)for complex designs with multiple clock domains. ExecuteStatic Timing Analysis (STA)using PrimeTime or Tempus to ensure timing closure across all corners and modes. Identify and resolvesetup, hold, and transition violationsthrough constraint tuning and logic optimization. Conductlogic equivalence checks (LEC)between RTL and synthesized netlist. Implementtiming ECOsand support final tape-out activities. Collaborate with physical design teams to ensure timing goals are met during PnR. Automate synthesis and STA flows usingTCL, Perl, or Python . Performformal verificationand quality checks to ensure first-pass success. Optimize designs forPPAthrough iterative synthesis and timing analysis.If interested kindly share your updated CV to anushab@canvendor.com


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