Synthesis (STA) Engineer
4 days ago
#Urgent_Opening_for_Canvendor#Hiring: Synthesis Engineer (5-10 years) | Bangalore| Immediate Joiners Preferred Location: Bangalore, India Experience: 5-10 years Notice period: Immediate#Key_Requirements:PerformRTL synthesisusing tools like Synopsys Design Compiler, Fusion Compiler, or Cadence Genus. Develop and validatetiming constraints (SDC)for complex designs with multiple clock domains. ExecuteStatic Timing Analysis (STA)using PrimeTime or Tempus to ensure timing closure across all corners and modes. Identify and resolvesetup, hold, and transition violationsthrough constraint tuning and logic optimization. Conductlogic equivalence checks (LEC)between RTL and synthesized netlist. Implementtiming ECOsand support final tape-out activities. Collaborate with physical design teams to ensure timing goals are met during PnR. Automate synthesis and STA flows usingTCL, Perl, or Python . Performformal verificationand quality checks to ensure first-pass success. Optimize designs forPPAthrough iterative synthesis and timing analysis.If interested kindly share your updated CV to anushab@canvendor.com
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Synthesis Engineer
1 week ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeJob Description – Senior Synthesis Engineer (VLSI)- Worked on 7nm/5nm/Future sub-micron Technologies. - Hands on experience in Physical Synthesis with Multi corner & Multi-mode, Low Power, Performance and Area Goal using Fusion Compiler or Genus. - Hands on experience in Logic equivalence check and low power check debugging and clean up using Conformal LEC...
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Synthesis Engineer
2 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeJob Description – Senior Synthesis Engineer (VLSI)Worked on 7nm/5nm/Future sub-micron Technologies. Hands on experienceinPhysical Synthesiswith Multi corner & Multi-mode, Low Power, Performance and Area Goalusing Fusion Compiler or Genus . Hands on experience in Logic equivalence checkand low power check debugging and clean up using Conformal LEC or...
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Lead STA
1 week ago
New Delhi, India Cadence System Design and Analysis Full timeBE /Btech EXp- 5- 12 YrsWork on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm. • Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR. • Contribute to design methodology, flow automation. • Innovate & implement Power, Performance and Area...
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STA Synthesis Engineer
2 weeks ago
New Delhi, India L&T Technology Services Full timeL&T Technology is looking to hire for STA Engineers.Job Location : BangaloreDetailed JD is below ::JD For STA Engineer-6+ ’ experience• Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs.• Can work closely with FE team for constraints development and constraints cleanup.• Work with...
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STA Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeRole:STA Engineer Experience:3+ Years Location:Bangalore (Onsite) Notice Period:Immediate to 30 Days / Serving NoticeKey Responsibilities: PerformStatic Timing Analysis (STA)at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). Develop, validate, and maintaintiming constraints (SDC files)for complex SoC and IP-level designs....
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Synthesis Engineer
2 weeks ago
delhi, India LeadSoc Technologies Pvt Ltd Full timeJob Description – Senior Synthesis Engineer (VLSI)Worked on 7nm/5nm/Future sub-micron Technologies.Hands on experience in Physical Synthesis with Multi corner & Multi-mode, Low Power, Performance and Area Goal using Fusion Compiler or Genus .Hands on experience in Logic equivalence check and low power check debugging and clean up using Conformal LEC or...
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Synthesis Engineer
1 week ago
Delhi, India LeadSoc Technologies Pvt Ltd Full timeJob Description – Senior Synthesis Engineer (VLSI)Worked on 7nm/5nm/Future sub-micron Technologies.Hands on experienceinPhysical Synthesiswith Multi corner & Multi-mode, Low Power, Performance and Area Goalusing Fusion Compiler or Genus .Hands on experience in Logic equivalence checkand low power check debugging and clean up using Conformal LEC or...
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STA Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeRole: STA EngineerExperience: 3+ YearsLocation: Bangalore (Onsite)Notice Period: Immediate to 30 Days / Serving NoticeKey Responsibilities:- Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). - Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...
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Full Chip STA Lead
2 weeks ago
New Delhi, India eInfochips (An Arrow Company) Full timeFull Chip STA Lead (8+ Years Experience)Locations:Bangalore, Hyderabad, Noida, Ahmedabad, Chennai, PuneJob Description: We are looking for an experiencedFull Chip STA Leadwith strong expertise in full-chip timing, constraint management, and cross-functional collaboration. The ideal candidate will drive timing closure activities for complex SoCs and provide...
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Synthesis Engineer
1 week ago
Delhi, India LeadSoc Technologies Pvt Ltd Full timeJob Description – Senior Synthesis Engineer (VLSI)Position OverviewWe are seeking a highly motivated and experiencedSenior Synthesis Engineerwith a strong background in VLSI design. The ideal candidate will have hands-on expertise in advanced technology nodes, physical synthesis, low-power methodologies, and cross-functional collaboration to meet...