ASIC Desing Verification Lead

1 week ago


Greater Bengaluru Area, India UST Full time

Hi All,


We are looking for ASIC design verification lead with UVM and Verilog experience.


from 8 to 16 years


Please forward your resume to jayalakshmi.r2@ust.com


Regards,

Jaya



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    Hi All,We are looking for ASIC design verification lead with UVM and Verilog experience.from 8 to 16 years Please forward your resume to jayalakshmi.r2@ust.comRegards,Jaya


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